This invention generally relates to programmable systems having memory means for storing control information and more specifically is directed to an improved system for protecting against the temporary loss of power in a programmable control system wherein system timing information is not lost, but is retained for later use when power is resumed permitting a return to normal system operation.
Programmable memories are increasingly being utilized for the timed control of a device by means of user initiated inputs. The applications in which such memories are utilized vary from industrial control systems to viewer control of a home video display device such as a television receiver or a video cassette recorder. The typical random access memory (RAM) is a volatile memory wherein the contents thereof are lost when the power applied thereto is interrupted.
In order to make these programmable systems operable in an environment where power interruptions may occur, even for very short durations, a nonvolatile memory is generally incorporated in combination with a RAM. Typically the user initiated control inputs are first stored in the RAM and then transferred to the nonvolatile memory for subsequent recall. These nonvolatile memories may take several forms. For example, a metal-nitride-oxide-semiconductor (MNOS) memory may be utilized as the nonvolatile memory device. However, these MNOS memories are not only expensive, but suffer from various operating limitations. One limitation in this type of memory device relates to the degradation of data retention therein with the number of erase/write cycles. In other words, the typical MNOS memory wears out with continued use. In addition, MNOS devices have relatively slow write times on the order of 100 milliseconds and currently have multiple power supply requirements.
Another type of memory device frequently used to compensate for power outages is a complementary-metal-oxide-semiconductor (CMOS) memory element. These CMOS nonvolatile memories are utilized in combination with a battery, an oscillator, and conventional recharging circuitry. Thus, during periods of power outage the battery powers the memory cell while timing information is provided thereto by the oscillator. The incorporation of these additional components not only increases system cost, but also results in system operating limitations. For example, batteries not only contain corrosive components which may leak, but also are subject to failure (in one to seven years), are highly temperature sensitive, and require mechanical design provisions allowing for access for replacement.
The present invention is intended to overcome the aforementioned limitations by providing a system for storing program timing information and real time data in a nonvolatile memory in response to the sensing of an imminent power outage condition. The system provides for the high speed storage of the program timing information and real time data in a nonvolatile memory for the duration of power outage, its recall therefrom upon resumption of power and the providing of such information to a microprocessor in exercising system control in accordance with previously programmed instructions.